1. Field
Apparatuses and methods consistent with exemplary embodiments relate to a semiconductor package including a semiconductor chip with a through opening.
2. Description of the Related Art
After a plurality of semiconductor chips are stacked on a substrate, an underfill is provided between the stacked semiconductor chips, or the semiconductor chips are molded with an epoxy molding compound (EMC), thereby forming a semiconductor package.
However, in the underfill process, the flow of the underfill solution from the outside of the semiconductor chip toward the center of the semiconductor chip may be slow. Accordingly, a void may be generated between bumps connecting the stacked semiconductor chips.
Further, in the molding process, before the EMC is filled between the stacked semiconductor chips, the semiconductor chip may be damaged by the pressure of the EMC positioned on the semiconductor chip. Further, while the pressure of the EMC positioned on the semiconductor chip is concentrated at a central portion of the semiconductor chip, stress may be applied to the bumps and a void may be generated between the bumps.